mirror of
https://github.com/opnsense/src.git
synced 2026-05-28 04:12:45 -04:00
hwpmc(4): Actually use a sufficiently wide type
jhibbits@ points out that left shifting bits 8-11 24 bits won't fit in a 32-bit integer either. Corrects r324533. Submitted by: jhibbits Sponsored by: Dell EMC Isilon
This commit is contained in:
parent
a7b8be82f0
commit
1356a2e6fa
1 changed files with 1 additions and 1 deletions
|
|
@ -67,7 +67,7 @@
|
|||
#define AMD_PMC_EVENTMASK 0xF000000FF
|
||||
|
||||
#define AMD_PMC_TO_UNITMASK(x) (((x) << 8) & AMD_PMC_UNITMASK)
|
||||
#define AMD_PMC_TO_EVENTMASK(x) (((x) & 0xFF) | (((uint32_t)(x) & 0xF00) << 24))
|
||||
#define AMD_PMC_TO_EVENTMASK(x) (((x) & 0xFF) | (((uint64_t)(x) & 0xF00) << 24))
|
||||
#define AMD_VALID_BITS (AMD_PMC_COUNTERMASK | AMD_PMC_INVERT | \
|
||||
AMD_PMC_ENABLE | AMD_PMC_INT | AMD_PMC_PC | AMD_PMC_EDGE | \
|
||||
AMD_PMC_OS | AMD_PMC_USR | AMD_PMC_UNITMASK | AMD_PMC_EVENTMASK)
|
||||
|
|
|
|||
Loading…
Reference in a new issue