From 0f7432f516e06ac65b2f40be6844d5b9ff726a8d Mon Sep 17 00:00:00 2001 From: Olivier Houchard Date: Sat, 13 Oct 2007 12:05:03 +0000 Subject: [PATCH] Do not use __XSCALE__ to detect if pld/strd/ldrd is available, use _ARM_ARCH_5E instead. MFC After: 3 days --- sys/arm/arm/bcopy_page.S | 10 +++++----- sys/arm/arm/bcopyinout.S | 4 ++-- sys/arm/arm/in_cksum_arm.S | 12 ++++++------ sys/arm/arm/support.S | 18 +++++++++--------- sys/arm/arm/swtch.S | 6 +++--- 5 files changed, 25 insertions(+), 25 deletions(-) diff --git a/sys/arm/arm/bcopy_page.S b/sys/arm/arm/bcopy_page.S index 0af7c112eee..27921d4182d 100644 --- a/sys/arm/arm/bcopy_page.S +++ b/sys/arm/arm/bcopy_page.S @@ -44,7 +44,7 @@ __FBSDID("$FreeBSD$"); #include "assym.s" -#ifndef __XSCALE__ +#ifndef _ARM_ARCH_5E /* #define BIG_LOOPS */ @@ -179,10 +179,10 @@ ENTRY(bzero_page) ldmfd sp!, {r4-r8, pc} -#else /* __XSCALE__ */ +#else /* _ARM_ARCH_5E */ /* - * XSCALE version of bcopy_page + * armv5e version of bcopy_page */ ENTRY(bcopy_page) pld [r0] @@ -248,7 +248,7 @@ ENTRY(bcopy_page) RET /* - * XSCALE version of bzero_page + * armv5e version of bzero_page */ ENTRY(bzero_page) mov r1, #PAGE_SIZE @@ -273,4 +273,4 @@ ENTRY(bzero_page) subs r1, r1, #128 bne 1b RET -#endif /* __XSCALE__ */ +#endif /* _ARM_ARCH_5E */ diff --git a/sys/arm/arm/bcopyinout.S b/sys/arm/arm/bcopyinout.S index b88cec60265..4ded8fb8521 100644 --- a/sys/arm/arm/bcopyinout.S +++ b/sys/arm/arm/bcopyinout.S @@ -46,7 +46,7 @@ .word _C_LABEL(_min_memcpy_size) __FBSDID("$FreeBSD$"); -#ifdef __XSCALE__ +#ifdef _ARM_ARCH_5E #include #else @@ -64,7 +64,7 @@ __FBSDID("$FreeBSD$"); #define SAVE_REGS stmfd sp!, {r4-r11} #define RESTORE_REGS ldmfd sp!, {r4-r11} -#if defined(__XSCALE__) +#if defined(_ARM_ARCH_5E) #define HELLOCPP # #define PREFETCH(rx,o) pld [ rx , HELLOCPP (o) ] #else diff --git a/sys/arm/arm/in_cksum_arm.S b/sys/arm/arm/in_cksum_arm.S index f9c9f9b0998..3646c640ef8 100644 --- a/sys/arm/arm/in_cksum_arm.S +++ b/sys/arm/arm/in_cksum_arm.S @@ -37,7 +37,7 @@ */ /* - * Hand-optimised in_cksum() and in4_cksum() implementations for ARM/Xscale + * Hand-optimised in_cksum() and in4_cksum() implementations for ARM/armv5e */ #include "opt_inet.h" @@ -113,7 +113,7 @@ ENTRY(do_cksum) */ /* LINTSTUB: Ignore */ ASENTRY_NP(L_cksumdata) -#ifdef __XSCALE__ +#ifdef _ARM_ARCH_5E pld [r0] /* Pre-fetch the start of the buffer */ #endif mov r2, #0 @@ -147,7 +147,7 @@ ASENTRY_NP(L_cksumdata) /* Buffer is now word aligned */ .Lcksumdata_wordaligned: -#ifdef __XSCALE__ +#ifdef _ARM_ARCH_5E cmp r1, #0x04 /* Less than 4 bytes left? */ blt .Lcksumdata_endgame /* Yup */ @@ -202,7 +202,7 @@ ASENTRY_NP(L_cksumdata) adcs r2, r2, r7 adc r2, r2, #0x00 -#else /* !__XSCALE__ */ +#else /* !_ARM_ARCH_5E */ subs r1, r1, #0x40 blt .Lcksumdata_bigloop_end @@ -238,7 +238,7 @@ ASENTRY_NP(L_cksumdata) RETeq cmp r1, #0x20 -#ifdef __XSCALE__ +#ifdef _ARM_ARCH_5E ldrged r4, [r0], #0x08 /* Avoid stalling pld and result */ blt .Lcksumdata_less_than_32 pld [r0, #0x18] @@ -280,7 +280,7 @@ ASENTRY_NP(L_cksumdata) nop /* - * Note: We use ldm here, even on Xscale, since the combined issue/result + * Note: We use ldm here, even on armv5e, since the combined issue/result * latencies for ldm and ldrd are the same. Using ldm avoids needless #ifdefs. */ /* At least 24 bytes remaining... */ diff --git a/sys/arm/arm/support.S b/sys/arm/arm/support.S index c2602bd2b9e..e6703ca4f54 100644 --- a/sys/arm/arm/support.S +++ b/sys/arm/arm/support.S @@ -86,13 +86,13 @@ do_memset: /* We are now word aligned */ .Lmemset_wordaligned: orr r3, r3, r3, lsl #8 /* Extend value to 16-bits */ -#ifdef __XSCALE__ - tst ip, #0x04 /* Quad-align for Xscale */ +#ifdef _ARM_ARCH_5E + tst ip, #0x04 /* Quad-align for armv5e */ #else cmp r1, #0x10 #endif orr r3, r3, r3, lsl #16 /* Extend value to 32-bits */ -#ifdef __XSCALE__ +#ifdef _ARM_ARCH_5E subne r1, r1, #0x04 /* Quad-align if necessary */ strne r3, [ip], #0x04 cmp r1, #0x10 @@ -105,7 +105,7 @@ do_memset: /* Do 128 bytes at a time */ .Lmemset_loop128: subs r1, r1, #0x80 -#ifdef __XSCALE__ +#ifdef _ARM_ARCH_5E strged r2, [ip], #0x08 strged r2, [ip], #0x08 strged r2, [ip], #0x08 @@ -148,7 +148,7 @@ do_memset: /* Do 32 bytes at a time */ .Lmemset_loop32: subs r1, r1, #0x20 -#ifdef __XSCALE__ +#ifdef _ARM_ARCH_5E strged r2, [ip], #0x08 strged r2, [ip], #0x08 strged r2, [ip], #0x08 @@ -165,7 +165,7 @@ do_memset: adds r1, r1, #0x10 /* Partially adjust for extra sub */ /* Deal with 16 bytes or more */ -#ifdef __XSCALE__ +#ifdef _ARM_ARCH_5E strged r2, [ip], #0x08 strged r2, [ip], #0x08 #else @@ -183,7 +183,7 @@ do_memset: bgt .Lmemset_loop4 RETeq /* Zero length so just exit */ -#ifdef __XSCALE__ +#ifdef _ARM_ARCH_5E /* Compensate for 64-bit alignment check */ adds r1, r1, #0x04 RETeq @@ -868,7 +868,7 @@ ENTRY(memmove) add r1, r1, #1 b .Lmemmove_bl4 -#if !defined(__XSCALE__) +#if !defined(_ARM_ARCH_5E) ENTRY(memcpy) /* save leaf functions having to store this away */ /* Do not check arm_memcpy if we're running from flash */ @@ -2870,7 +2870,7 @@ ENTRY(memcpy) strh r2, [r0, #0x09] strb r1, [r0, #0x0b] RET -#endif /* __XSCALE__ */ +#endif /* _ARM_ARCH_5E */ #ifdef GPROF diff --git a/sys/arm/arm/swtch.S b/sys/arm/arm/swtch.S index ab3dcaaeca2..5d59f99c981 100644 --- a/sys/arm/arm/swtch.S +++ b/sys/arm/arm/swtch.S @@ -187,7 +187,7 @@ ENTRY(cpu_throw) ldr pc, [r9, #CF_CONTEXT_SWITCH] /* Restore all the save registers */ -#ifndef __XSCALE__ +#ifndef _ARM_ARCH_5E add r1, r7, #PCB_R8 ldmia r1, {r8-r13} #else @@ -249,7 +249,7 @@ ENTRY(cpu_switch) mov r4, r0 /* Save the old thread. */ /* Save all the registers in the old thread's pcb */ -#ifndef __XSCALE__ +#ifndef _ARM_ARCH_5E add r7, r2, #(PCB_R8) stmia r7, {r8-r13} #else @@ -419,7 +419,7 @@ ENTRY(cpu_switch) msr cpsr_c, r3 /* Restore the old mode */ /* Restore all the save registers */ -#ifndef __XSCALE__ +#ifndef _ARM_ARCH_5E add r7, r9, #PCB_R8 ldmia r7, {r8-r13} sub r7, r7, #PCB_R8 /* restore PCB pointer */