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riscv: Add cvitek SoC files to the build

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Reviewed by:	br, jrtc27
Differential Revision:	https://reviews.freebsd.org/D48533
This commit is contained in:
Bojan Novković 2025-01-18 20:13:44 +01:00
parent e07254d148
commit 092b70dadb
3 changed files with 19 additions and 0 deletions
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1
sys/riscv/conf/GENERIC
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@ -206,6 +206,7 @@ device iicoc # OpenCores I2C controller support
# Include SoC specific configuration
include "std.allwinner"
include "std.cvitek"
include "std.eswin"
include "std.sifive"
include "std.starfive"

14
sys/riscv/conf/std.cvitek Normal file
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@ -0,0 +1,14 @@
#
# CVITEK SoC support
#
device fdt
device dwc
device dwgpio
device uart_snps
device dwc_cvitek
device sdhci_cvitek
device cvitek_reset
device cvitek_restart
files "../cvitek/files.cvitek"

4
sys/riscv/cvitek/files.cvitek Normal file
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@ -0,0 +1,4 @@
riscv/cvitek/cvitek_restart.c optional fdt cvitek_restart
riscv/cvitek/cvitek_reset.c optional fdt cvitek_reset
dev/dwc/if_dwc_cvitek.c optional fdt dwc_cvitek
dev/sdhci/sdhci_fdt_cvitek.c optional fdt sdhci sdhci_cvitek regulator