From 08f06f0ace517ff96b4d3165b12ea113b2c0ef14 Mon Sep 17 00:00:00 2001 From: Adrian Chadd Date: Sun, 28 Sep 2014 07:27:58 +0000 Subject: [PATCH] Fix the AR724x PCIe glue to correctly probe the BAR on AR7240 devices. There's a bug in the AR7240 PCIe hardware where a correct BAR will end up having the device disappear. It turns out that for the device address it should be all 0's. However, this meant that the PCI probe code would try writing 0xffffffff in to see how big the window was, read back 0x0, and think the window was 32 bits. It then ended up calculating a resource size of 0 bytes, failed to find anything via an rman call, and this would fail to attach. I have quite absolutely no idea how in the various planes of existence this particular bit of code and how it worked with the PCI bus code ever worked. But, well, it did. Tested: * Atheros AP93 - AR7240 + AR9280 reference board --- sys/mips/atheros/ar724x_pci.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/sys/mips/atheros/ar724x_pci.c b/sys/mips/atheros/ar724x_pci.c index 172c8d4a1e7..854cd6560f0 100644 --- a/sys/mips/atheros/ar724x_pci.c +++ b/sys/mips/atheros/ar724x_pci.c @@ -159,10 +159,18 @@ ar724x_pci_write_config(device_t dev, u_int bus, u_int slot, u_int func, return; /* - * WAR for BAR issue on AR7240 - We are unable to access the PCI device - * space if we set the BAR with proper base address. + * WAR for BAR issue on AR7240 - We are unable to access the PCI + * device space if we set the BAR with proper base address. + * + * However, we _do_ want to allow programming in the probe value + * (0xffffffff) so the PCI code can find out how big the memory + * map is for this device. Without it, it'll think the memory + * map is 32 bits wide, the PCI code will then end up thinking + * the register window is '0' and fail to allocate resources. */ - if (reg == PCIR_BAR(0) && bytes == 4 && ar71xx_soc == AR71XX_SOC_AR7240) + if (reg == PCIR_BAR(0) && bytes == 4 + && ar71xx_soc == AR71XX_SOC_AR7240 + && data != 0xffffffff) ar724x_pci_write(AR724X_PCI_CFG_BASE, reg, 0xffff, bytes); else ar724x_pci_write(AR724X_PCI_CFG_BASE, reg, data, bytes);