diff --git a/sys/mips/atheros/ar724x_pci.c b/sys/mips/atheros/ar724x_pci.c
index 172c8d4a1e7..854cd6560f0 100644
--- a/sys/mips/atheros/ar724x_pci.c
+++ b/sys/mips/atheros/ar724x_pci.c
@@ -159,10 +159,18 @@ ar724x_pci_write_config(device_t dev, u_int bus, u_int slot, u_int func,
 		return;
 
 	/*
-	 * WAR for BAR issue on AR7240 - We are unable to access the PCI device
-	 * space if we set the BAR with proper base address.
+	 * WAR for BAR issue on AR7240 - We are unable to access the PCI
+	 * device space if we set the BAR with proper base address.
+	 *
+	 * However, we _do_ want to allow programming in the probe value
+	 * (0xffffffff) so the PCI code can find out how big the memory
+	 * map is for this device.  Without it, it'll think the memory
+	 * map is 32 bits wide, the PCI code will then end up thinking
+	 * the register window is '0' and fail to allocate resources.
 	 */
-	if (reg == PCIR_BAR(0) && bytes == 4 && ar71xx_soc == AR71XX_SOC_AR7240)
+	if (reg == PCIR_BAR(0) && bytes == 4
+	    && ar71xx_soc == AR71XX_SOC_AR7240
+	    && data != 0xffffffff)
 		ar724x_pci_write(AR724X_PCI_CFG_BASE, reg, 0xffff, bytes);
 	else
 		ar724x_pci_write(AR724X_PCI_CFG_BASE, reg, data, bytes);