From 0847c06d2e1f3164e4e074d834806d544b0ad184 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Stefan=20E=C3=9Fer?= Date: Wed, 28 Jun 1995 15:54:57 +0000 Subject: [PATCH] PCI configuration mechanism now determined by a method, that doesn't fail on new hardware (Compaq Prolinea and Compaq Prosignea), and that doesn't erroneously identify old mech. 2 chip sets as using mech. 1. (See section 3.6.4.1.1 of the PCI bus specs rev. 2.0) --- sys/amd64/pci/pci_bus.c | 36 +++++++++++++++++++----------------- sys/amd64/pci/pci_cfgreg.c | 36 +++++++++++++++++++----------------- sys/i386/isa/pcibus.c | 36 +++++++++++++++++++----------------- sys/i386/pci/pci_bus.c | 36 +++++++++++++++++++----------------- sys/i386/pci/pci_cfgreg.c | 36 +++++++++++++++++++----------------- sys/i386/pci/pci_pir.c | 36 +++++++++++++++++++----------------- 6 files changed, 114 insertions(+), 102 deletions(-) diff --git a/sys/amd64/pci/pci_bus.c b/sys/amd64/pci/pci_bus.c index 7fbb80f12cd..d2a2ad92797 100644 --- a/sys/amd64/pci/pci_bus.c +++ b/sys/amd64/pci/pci_bus.c @@ -1,6 +1,6 @@ /************************************************************************** ** -** $Id: pcibus.c,v 1.7 1995/03/22 19:51:59 se Exp $ +** $Id: pcibus.c,v 1.8 1995/03/22 21:35:39 se Exp $ ** ** pci bus subroutines for i386 architecture. ** @@ -139,6 +139,7 @@ DATA_SET (pcibus_set, i386pci); #define CONF1_ENABLE 0x80000000ul +#define CONF1_ENABLE_CHK 0xF0000000ul #define CONF1_ADDR_PORT 0x0cf8 #define CONF1_DATA_PORT 0x0cfc @@ -152,6 +153,23 @@ pcibus_setup (void) { u_long result, oldval; + /*--------------------------------------- + ** Configuration mode 1 ? + **--------------------------------------- + */ + + oldval = inl (CONF1_ADDR_PORT); + outl (CONF1_ADDR_PORT, CONF1_ENABLE_CHK); + outb (CONF1_ADDR_PORT +3, 0); + result = inl (CONF1_ADDR_PORT); + outl (CONF1_ADDR_PORT, oldval); + + if (result == CONF1_ENABLE) { + pci_mechanism = 1; + pci_maxdevice = 32; + return; + }; + /*--------------------------------------- ** Configuration mode 2 ? **--------------------------------------- @@ -165,22 +183,6 @@ pcibus_setup (void) return; }; - /*--------------------------------------- - ** Configuration mode 1 ? - **--------------------------------------- - */ - - oldval = inl (CONF1_ADDR_PORT); - outl (CONF1_ADDR_PORT, CONF1_ENABLE); - result = inl (CONF1_ADDR_PORT); - outl (CONF1_ADDR_PORT, oldval); - - if (result == CONF1_ENABLE) { - pci_mechanism = 1; - pci_maxdevice = 32; - return; - }; - /*--------------------------------------- ** No PCI bus available. **--------------------------------------- diff --git a/sys/amd64/pci/pci_cfgreg.c b/sys/amd64/pci/pci_cfgreg.c index 7fbb80f12cd..d2a2ad92797 100644 --- a/sys/amd64/pci/pci_cfgreg.c +++ b/sys/amd64/pci/pci_cfgreg.c @@ -1,6 +1,6 @@ /************************************************************************** ** -** $Id: pcibus.c,v 1.7 1995/03/22 19:51:59 se Exp $ +** $Id: pcibus.c,v 1.8 1995/03/22 21:35:39 se Exp $ ** ** pci bus subroutines for i386 architecture. ** @@ -139,6 +139,7 @@ DATA_SET (pcibus_set, i386pci); #define CONF1_ENABLE 0x80000000ul +#define CONF1_ENABLE_CHK 0xF0000000ul #define CONF1_ADDR_PORT 0x0cf8 #define CONF1_DATA_PORT 0x0cfc @@ -152,6 +153,23 @@ pcibus_setup (void) { u_long result, oldval; + /*--------------------------------------- + ** Configuration mode 1 ? + **--------------------------------------- + */ + + oldval = inl (CONF1_ADDR_PORT); + outl (CONF1_ADDR_PORT, CONF1_ENABLE_CHK); + outb (CONF1_ADDR_PORT +3, 0); + result = inl (CONF1_ADDR_PORT); + outl (CONF1_ADDR_PORT, oldval); + + if (result == CONF1_ENABLE) { + pci_mechanism = 1; + pci_maxdevice = 32; + return; + }; + /*--------------------------------------- ** Configuration mode 2 ? **--------------------------------------- @@ -165,22 +183,6 @@ pcibus_setup (void) return; }; - /*--------------------------------------- - ** Configuration mode 1 ? - **--------------------------------------- - */ - - oldval = inl (CONF1_ADDR_PORT); - outl (CONF1_ADDR_PORT, CONF1_ENABLE); - result = inl (CONF1_ADDR_PORT); - outl (CONF1_ADDR_PORT, oldval); - - if (result == CONF1_ENABLE) { - pci_mechanism = 1; - pci_maxdevice = 32; - return; - }; - /*--------------------------------------- ** No PCI bus available. **--------------------------------------- diff --git a/sys/i386/isa/pcibus.c b/sys/i386/isa/pcibus.c index 7fbb80f12cd..d2a2ad92797 100644 --- a/sys/i386/isa/pcibus.c +++ b/sys/i386/isa/pcibus.c @@ -1,6 +1,6 @@ /************************************************************************** ** -** $Id: pcibus.c,v 1.7 1995/03/22 19:51:59 se Exp $ +** $Id: pcibus.c,v 1.8 1995/03/22 21:35:39 se Exp $ ** ** pci bus subroutines for i386 architecture. ** @@ -139,6 +139,7 @@ DATA_SET (pcibus_set, i386pci); #define CONF1_ENABLE 0x80000000ul +#define CONF1_ENABLE_CHK 0xF0000000ul #define CONF1_ADDR_PORT 0x0cf8 #define CONF1_DATA_PORT 0x0cfc @@ -152,6 +153,23 @@ pcibus_setup (void) { u_long result, oldval; + /*--------------------------------------- + ** Configuration mode 1 ? + **--------------------------------------- + */ + + oldval = inl (CONF1_ADDR_PORT); + outl (CONF1_ADDR_PORT, CONF1_ENABLE_CHK); + outb (CONF1_ADDR_PORT +3, 0); + result = inl (CONF1_ADDR_PORT); + outl (CONF1_ADDR_PORT, oldval); + + if (result == CONF1_ENABLE) { + pci_mechanism = 1; + pci_maxdevice = 32; + return; + }; + /*--------------------------------------- ** Configuration mode 2 ? **--------------------------------------- @@ -165,22 +183,6 @@ pcibus_setup (void) return; }; - /*--------------------------------------- - ** Configuration mode 1 ? - **--------------------------------------- - */ - - oldval = inl (CONF1_ADDR_PORT); - outl (CONF1_ADDR_PORT, CONF1_ENABLE); - result = inl (CONF1_ADDR_PORT); - outl (CONF1_ADDR_PORT, oldval); - - if (result == CONF1_ENABLE) { - pci_mechanism = 1; - pci_maxdevice = 32; - return; - }; - /*--------------------------------------- ** No PCI bus available. **--------------------------------------- diff --git a/sys/i386/pci/pci_bus.c b/sys/i386/pci/pci_bus.c index 7fbb80f12cd..d2a2ad92797 100644 --- a/sys/i386/pci/pci_bus.c +++ b/sys/i386/pci/pci_bus.c @@ -1,6 +1,6 @@ /************************************************************************** ** -** $Id: pcibus.c,v 1.7 1995/03/22 19:51:59 se Exp $ +** $Id: pcibus.c,v 1.8 1995/03/22 21:35:39 se Exp $ ** ** pci bus subroutines for i386 architecture. ** @@ -139,6 +139,7 @@ DATA_SET (pcibus_set, i386pci); #define CONF1_ENABLE 0x80000000ul +#define CONF1_ENABLE_CHK 0xF0000000ul #define CONF1_ADDR_PORT 0x0cf8 #define CONF1_DATA_PORT 0x0cfc @@ -152,6 +153,23 @@ pcibus_setup (void) { u_long result, oldval; + /*--------------------------------------- + ** Configuration mode 1 ? + **--------------------------------------- + */ + + oldval = inl (CONF1_ADDR_PORT); + outl (CONF1_ADDR_PORT, CONF1_ENABLE_CHK); + outb (CONF1_ADDR_PORT +3, 0); + result = inl (CONF1_ADDR_PORT); + outl (CONF1_ADDR_PORT, oldval); + + if (result == CONF1_ENABLE) { + pci_mechanism = 1; + pci_maxdevice = 32; + return; + }; + /*--------------------------------------- ** Configuration mode 2 ? **--------------------------------------- @@ -165,22 +183,6 @@ pcibus_setup (void) return; }; - /*--------------------------------------- - ** Configuration mode 1 ? - **--------------------------------------- - */ - - oldval = inl (CONF1_ADDR_PORT); - outl (CONF1_ADDR_PORT, CONF1_ENABLE); - result = inl (CONF1_ADDR_PORT); - outl (CONF1_ADDR_PORT, oldval); - - if (result == CONF1_ENABLE) { - pci_mechanism = 1; - pci_maxdevice = 32; - return; - }; - /*--------------------------------------- ** No PCI bus available. **--------------------------------------- diff --git a/sys/i386/pci/pci_cfgreg.c b/sys/i386/pci/pci_cfgreg.c index 7fbb80f12cd..d2a2ad92797 100644 --- a/sys/i386/pci/pci_cfgreg.c +++ b/sys/i386/pci/pci_cfgreg.c @@ -1,6 +1,6 @@ /************************************************************************** ** -** $Id: pcibus.c,v 1.7 1995/03/22 19:51:59 se Exp $ +** $Id: pcibus.c,v 1.8 1995/03/22 21:35:39 se Exp $ ** ** pci bus subroutines for i386 architecture. ** @@ -139,6 +139,7 @@ DATA_SET (pcibus_set, i386pci); #define CONF1_ENABLE 0x80000000ul +#define CONF1_ENABLE_CHK 0xF0000000ul #define CONF1_ADDR_PORT 0x0cf8 #define CONF1_DATA_PORT 0x0cfc @@ -152,6 +153,23 @@ pcibus_setup (void) { u_long result, oldval; + /*--------------------------------------- + ** Configuration mode 1 ? + **--------------------------------------- + */ + + oldval = inl (CONF1_ADDR_PORT); + outl (CONF1_ADDR_PORT, CONF1_ENABLE_CHK); + outb (CONF1_ADDR_PORT +3, 0); + result = inl (CONF1_ADDR_PORT); + outl (CONF1_ADDR_PORT, oldval); + + if (result == CONF1_ENABLE) { + pci_mechanism = 1; + pci_maxdevice = 32; + return; + }; + /*--------------------------------------- ** Configuration mode 2 ? **--------------------------------------- @@ -165,22 +183,6 @@ pcibus_setup (void) return; }; - /*--------------------------------------- - ** Configuration mode 1 ? - **--------------------------------------- - */ - - oldval = inl (CONF1_ADDR_PORT); - outl (CONF1_ADDR_PORT, CONF1_ENABLE); - result = inl (CONF1_ADDR_PORT); - outl (CONF1_ADDR_PORT, oldval); - - if (result == CONF1_ENABLE) { - pci_mechanism = 1; - pci_maxdevice = 32; - return; - }; - /*--------------------------------------- ** No PCI bus available. **--------------------------------------- diff --git a/sys/i386/pci/pci_pir.c b/sys/i386/pci/pci_pir.c index 7fbb80f12cd..d2a2ad92797 100644 --- a/sys/i386/pci/pci_pir.c +++ b/sys/i386/pci/pci_pir.c @@ -1,6 +1,6 @@ /************************************************************************** ** -** $Id: pcibus.c,v 1.7 1995/03/22 19:51:59 se Exp $ +** $Id: pcibus.c,v 1.8 1995/03/22 21:35:39 se Exp $ ** ** pci bus subroutines for i386 architecture. ** @@ -139,6 +139,7 @@ DATA_SET (pcibus_set, i386pci); #define CONF1_ENABLE 0x80000000ul +#define CONF1_ENABLE_CHK 0xF0000000ul #define CONF1_ADDR_PORT 0x0cf8 #define CONF1_DATA_PORT 0x0cfc @@ -152,6 +153,23 @@ pcibus_setup (void) { u_long result, oldval; + /*--------------------------------------- + ** Configuration mode 1 ? + **--------------------------------------- + */ + + oldval = inl (CONF1_ADDR_PORT); + outl (CONF1_ADDR_PORT, CONF1_ENABLE_CHK); + outb (CONF1_ADDR_PORT +3, 0); + result = inl (CONF1_ADDR_PORT); + outl (CONF1_ADDR_PORT, oldval); + + if (result == CONF1_ENABLE) { + pci_mechanism = 1; + pci_maxdevice = 32; + return; + }; + /*--------------------------------------- ** Configuration mode 2 ? **--------------------------------------- @@ -165,22 +183,6 @@ pcibus_setup (void) return; }; - /*--------------------------------------- - ** Configuration mode 1 ? - **--------------------------------------- - */ - - oldval = inl (CONF1_ADDR_PORT); - outl (CONF1_ADDR_PORT, CONF1_ENABLE); - result = inl (CONF1_ADDR_PORT); - outl (CONF1_ADDR_PORT, oldval); - - if (result == CONF1_ENABLE) { - pci_mechanism = 1; - pci_maxdevice = 32; - return; - }; - /*--------------------------------------- ** No PCI bus available. **---------------------------------------