mirror of
https://github.com/opnsense/src.git
synced 2026-05-28 04:12:45 -04:00
MFC rev 200051:
Make sure bus space accesses use unorder memory loads and stores.
This commit is contained in:
parent
21148e9257
commit
0800f014ec
5 changed files with 155 additions and 80 deletions
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@ -859,14 +859,14 @@ ia64_init(void)
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return (ret);
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}
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__volatile void *
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void *
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ia64_ioport_address(u_int port)
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{
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uint64_t addr;
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addr = (port > 0xffff) ? IA64_PHYS_TO_RR6((uint64_t)port) :
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ia64_port_base | ((port & 0xfffc) << 10) | (port & 0xFFF);
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return ((__volatile void *)addr);
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return ((void *)addr);
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}
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uint64_t
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@ -775,8 +775,10 @@ ENTRY(copyinstr, 4)
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;;
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br.call.sptk.few rp=copystr // do the copy.
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st8 [loc2]=r0 // kill the fault handler.
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;;
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mov ar.pfs=loc0 // restore ar.pfs
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mov rp=loc1 // restore ra.
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;;
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br.ret.sptk.few rp // ret0 left over from copystr
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END(copyinstr)
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@ -887,8 +889,10 @@ ENTRY(copyin, 3)
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;;
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br.call.sptk.few rp=bcopy // do the copy.
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st8 [loc2]=r0 // kill the fault handler.
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;;
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mov ar.pfs=loc0 // restore ar.pfs
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mov rp=loc1 // restore ra.
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;;
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br.ret.sptk.few rp // ret0 left over from bcopy
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END(copyin)
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@ -925,8 +929,10 @@ ENTRY(copyout, 3)
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;;
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br.call.sptk.few rp=bcopy // do the copy.
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st8 [loc2]=r0 // kill the fault handler.
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;;
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mov ar.pfs=loc0 // restore ar.pfs
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mov rp=loc1 // restore ra.
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;;
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br.ret.sptk.few rp // ret0 left over from bcopy
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END(copyout)
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@ -979,6 +985,7 @@ ENTRY_NOPROFILE(_mcount, 4)
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;;
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2:
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mov ar.pfs = r14
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;;
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br.sptk b6
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;;
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END(_mcount)
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@ -169,37 +169,37 @@ bus_space_barrier(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs,
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static __inline uint8_t
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bus_space_read_1(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs)
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{
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uint8_t __volatile *bsp;
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uint8_t *bsp;
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bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
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__MEMIO_ADDR(bsh + ofs);
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return (*bsp);
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return (ia64_ld1(bsp));
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}
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static __inline uint16_t
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bus_space_read_2(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs)
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{
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uint16_t __volatile *bsp;
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uint16_t *bsp;
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bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
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__MEMIO_ADDR(bsh + ofs);
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return (*bsp);
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return (ia64_ld2(bsp));
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}
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static __inline uint32_t
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bus_space_read_4(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs)
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{
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uint32_t __volatile *bsp;
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uint32_t *bsp;
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bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
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__MEMIO_ADDR(bsh + ofs);
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return (*bsp);
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return (ia64_ld4(bsp));
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}
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static __inline uint64_t
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bus_space_read_8(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs)
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{
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uint64_t __volatile *bsp;
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uint64_t *bsp;
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bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
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__MEMIO_ADDR(bsh + ofs);
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return (*bsp);
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return (ia64_ld8(bsp));
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}
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@ -212,40 +212,40 @@ static __inline void
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bus_space_write_1(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs,
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uint8_t val)
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{
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uint8_t __volatile *bsp;
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uint8_t *bsp;
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bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
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__MEMIO_ADDR(bsh + ofs);
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*bsp = val;
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ia64_st1(bsp, val);
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}
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static __inline void
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bus_space_write_2(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs,
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uint16_t val)
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{
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uint16_t __volatile *bsp;
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uint16_t *bsp;
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bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
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__MEMIO_ADDR(bsh + ofs);
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*bsp = val;
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ia64_st2(bsp, val);
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}
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static __inline void
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bus_space_write_4(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs,
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uint32_t val)
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{
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uint32_t __volatile *bsp;
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uint32_t *bsp;
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bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
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__MEMIO_ADDR(bsh + ofs);
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*bsp = val;
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ia64_st4(bsp, val);
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}
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static __inline void
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bus_space_write_8(bus_space_tag_t bst, bus_space_handle_t bsh, bus_size_t ofs,
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uint64_t val)
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{
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uint64_t __volatile *bsp;
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uint64_t *bsp;
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bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
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__MEMIO_ADDR(bsh + ofs);
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*bsp = val;
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ia64_st8(bsp, val);
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}
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@ -258,44 +258,44 @@ static __inline void
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bus_space_read_multi_1(bus_space_tag_t bst, bus_space_handle_t bsh,
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bus_size_t ofs, uint8_t *bufp, size_t count)
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{
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uint8_t __volatile *bsp;
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uint8_t *bsp;
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bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
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__MEMIO_ADDR(bsh + ofs);
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while (count-- > 0)
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*bufp++ = *bsp;
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*bufp++ = ia64_ld1(bsp);
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}
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static __inline void
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bus_space_read_multi_2(bus_space_tag_t bst, bus_space_handle_t bsh,
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bus_size_t ofs, uint16_t *bufp, size_t count)
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{
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uint16_t __volatile *bsp;
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uint16_t *bsp;
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bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
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__MEMIO_ADDR(bsh + ofs);
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while (count-- > 0)
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*bufp++ = *bsp;
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*bufp++ = ia64_ld2(bsp);
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}
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static __inline void
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bus_space_read_multi_4(bus_space_tag_t bst, bus_space_handle_t bsh,
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bus_size_t ofs, uint32_t *bufp, size_t count)
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{
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uint32_t __volatile *bsp;
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uint32_t *bsp;
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bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
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__MEMIO_ADDR(bsh + ofs);
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while (count-- > 0)
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*bufp++ = *bsp;
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*bufp++ = ia64_ld4(bsp);
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}
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static __inline void
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bus_space_read_multi_8(bus_space_tag_t bst, bus_space_handle_t bsh,
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bus_size_t ofs, uint64_t *bufp, size_t count)
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{
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uint64_t __volatile *bsp;
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uint64_t *bsp;
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bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
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__MEMIO_ADDR(bsh + ofs);
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while (count-- > 0)
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*bufp++ = *bsp;
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*bufp++ = ia64_ld8(bsp);
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}
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@ -308,44 +308,44 @@ static __inline void
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bus_space_write_multi_1(bus_space_tag_t bst, bus_space_handle_t bsh,
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bus_size_t ofs, const uint8_t *bufp, size_t count)
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{
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uint8_t __volatile *bsp;
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uint8_t *bsp;
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bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
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__MEMIO_ADDR(bsh + ofs);
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while (count-- > 0)
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*bsp = *bufp++;
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ia64_st1(bsp, *bufp++);
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}
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static __inline void
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bus_space_write_multi_2(bus_space_tag_t bst, bus_space_handle_t bsh,
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bus_size_t ofs, const uint16_t *bufp, size_t count)
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{
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uint16_t __volatile *bsp;
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uint16_t *bsp;
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bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
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__MEMIO_ADDR(bsh + ofs);
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while (count-- > 0)
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*bsp = *bufp++;
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ia64_st2(bsp, *bufp++);
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}
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static __inline void
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bus_space_write_multi_4(bus_space_tag_t bst, bus_space_handle_t bsh,
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bus_size_t ofs, const uint32_t *bufp, size_t count)
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{
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uint32_t __volatile *bsp;
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uint32_t *bsp;
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bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
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__MEMIO_ADDR(bsh + ofs);
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while (count-- > 0)
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*bsp = *bufp++;
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ia64_st4(bsp, *bufp++);
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}
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static __inline void
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bus_space_write_multi_8(bus_space_tag_t bst, bus_space_handle_t bsh,
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bus_size_t ofs, const uint64_t *bufp, size_t count)
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{
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uint64_t __volatile *bsp;
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uint64_t *bsp;
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bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
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__MEMIO_ADDR(bsh + ofs);
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while (count-- > 0)
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*bsp = *bufp++;
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ia64_st8(bsp, *bufp++);
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}
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@ -359,11 +359,11 @@ static __inline void
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bus_space_read_region_1(bus_space_tag_t bst, bus_space_handle_t bsh,
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bus_size_t ofs, uint8_t *bufp, size_t count)
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{
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uint8_t __volatile *bsp;
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uint8_t *bsp;
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while (count-- > 0) {
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bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
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__MEMIO_ADDR(bsh + ofs);
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*bufp++ = *bsp;
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*bufp++ = ia64_ld1(bsp);
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ofs += 1;
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}
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}
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@ -372,11 +372,11 @@ static __inline void
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bus_space_read_region_2(bus_space_tag_t bst, bus_space_handle_t bsh,
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bus_size_t ofs, uint16_t *bufp, size_t count)
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{
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uint16_t __volatile *bsp;
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uint16_t *bsp;
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while (count-- > 0) {
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bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
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__MEMIO_ADDR(bsh + ofs);
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*bufp++ = *bsp;
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*bufp++ = ia64_ld2(bsp);
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ofs += 2;
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}
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}
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@ -385,11 +385,11 @@ static __inline void
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bus_space_read_region_4(bus_space_tag_t bst, bus_space_handle_t bsh,
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bus_size_t ofs, uint32_t *bufp, size_t count)
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{
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uint32_t __volatile *bsp;
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uint32_t *bsp;
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while (count-- > 0) {
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bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
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__MEMIO_ADDR(bsh + ofs);
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*bufp++ = *bsp;
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*bufp++ = ia64_ld4(bsp);
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ofs += 4;
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}
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}
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@ -398,11 +398,11 @@ static __inline void
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bus_space_read_region_8(bus_space_tag_t bst, bus_space_handle_t bsh,
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bus_size_t ofs, uint64_t *bufp, size_t count)
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{
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uint64_t __volatile *bsp;
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uint64_t *bsp;
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while (count-- > 0) {
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bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
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__MEMIO_ADDR(bsh + ofs);
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*bufp++ = *bsp;
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*bufp++ = ia64_ld8(bsp);
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ofs += 8;
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}
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}
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@ -418,11 +418,11 @@ static __inline void
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bus_space_write_region_1(bus_space_tag_t bst, bus_space_handle_t bsh,
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bus_size_t ofs, const uint8_t *bufp, size_t count)
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{
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uint8_t __volatile *bsp;
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uint8_t *bsp;
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while (count-- > 0) {
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bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
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__MEMIO_ADDR(bsh + ofs);
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*bsp = *bufp++;
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ia64_st1(bsp, *bufp++);
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ofs += 1;
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}
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}
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@ -431,11 +431,11 @@ static __inline void
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bus_space_write_region_2(bus_space_tag_t bst, bus_space_handle_t bsh,
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bus_size_t ofs, const uint16_t *bufp, size_t count)
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{
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uint16_t __volatile *bsp;
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uint16_t *bsp;
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while (count-- > 0) {
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bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
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__MEMIO_ADDR(bsh + ofs);
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*bsp = *bufp++;
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ia64_st2(bsp, *bufp++);
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ofs += 2;
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}
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}
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@ -444,11 +444,11 @@ static __inline void
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bus_space_write_region_4(bus_space_tag_t bst, bus_space_handle_t bsh,
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bus_size_t ofs, const uint32_t *bufp, size_t count)
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{
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uint32_t __volatile *bsp;
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uint32_t *bsp;
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while (count-- > 0) {
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bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
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__MEMIO_ADDR(bsh + ofs);
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*bsp = *bufp++;
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ia64_st4(bsp, *bufp++);
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ofs += 4;
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}
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}
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@ -457,11 +457,11 @@ static __inline void
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bus_space_write_region_8(bus_space_tag_t bst, bus_space_handle_t bsh,
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bus_size_t ofs, const uint64_t *bufp, size_t count)
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{
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uint64_t __volatile *bsp;
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uint64_t *bsp;
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while (count-- > 0) {
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bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
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__MEMIO_ADDR(bsh + ofs);
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*bsp = *bufp++;
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ia64_st8(bsp, *bufp++);
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ofs += 8;
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}
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}
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@ -476,44 +476,44 @@ static __inline void
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bus_space_set_multi_1(bus_space_tag_t bst, bus_space_handle_t bsh,
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bus_size_t ofs, uint8_t val, size_t count)
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{
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uint8_t __volatile *bsp;
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uint8_t *bsp;
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bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
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__MEMIO_ADDR(bsh + ofs);
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while (count-- > 0)
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*bsp = val;
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ia64_st1(bsp, val);
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}
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static __inline void
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bus_space_set_multi_2(bus_space_tag_t bst, bus_space_handle_t bsh,
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bus_size_t ofs, uint16_t val, size_t count)
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{
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uint16_t __volatile *bsp;
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uint16_t *bsp;
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bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
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__MEMIO_ADDR(bsh + ofs);
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while (count-- > 0)
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*bsp = val;
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ia64_st2(bsp, val);
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}
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static __inline void
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bus_space_set_multi_4(bus_space_tag_t bst, bus_space_handle_t bsh,
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bus_size_t ofs, uint32_t val, size_t count)
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{
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uint32_t __volatile *bsp;
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uint32_t *bsp;
|
||||
bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
|
||||
__MEMIO_ADDR(bsh + ofs);
|
||||
while (count-- > 0)
|
||||
*bsp = val;
|
||||
ia64_st4(bsp, val);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
bus_space_set_multi_8(bus_space_tag_t bst, bus_space_handle_t bsh,
|
||||
bus_size_t ofs, uint64_t val, size_t count)
|
||||
{
|
||||
uint64_t __volatile *bsp;
|
||||
uint64_t *bsp;
|
||||
bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
|
||||
__MEMIO_ADDR(bsh + ofs);
|
||||
while (count-- > 0)
|
||||
*bsp = val;
|
||||
ia64_st8(bsp, val);
|
||||
}
|
||||
|
||||
|
||||
|
|
@ -527,11 +527,11 @@ static __inline void
|
|||
bus_space_set_region_1(bus_space_tag_t bst, bus_space_handle_t bsh,
|
||||
bus_size_t ofs, uint8_t val, size_t count)
|
||||
{
|
||||
uint8_t __volatile *bsp;
|
||||
uint8_t *bsp;
|
||||
while (count-- > 0) {
|
||||
bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
|
||||
__MEMIO_ADDR(bsh + ofs);
|
||||
*bsp = val;
|
||||
ia64_st1(bsp, val);
|
||||
ofs += 1;
|
||||
}
|
||||
}
|
||||
|
|
@ -540,11 +540,11 @@ static __inline void
|
|||
bus_space_set_region_2(bus_space_tag_t bst, bus_space_handle_t bsh,
|
||||
bus_size_t ofs, uint16_t val, size_t count)
|
||||
{
|
||||
uint16_t __volatile *bsp;
|
||||
uint16_t *bsp;
|
||||
while (count-- > 0) {
|
||||
bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
|
||||
__MEMIO_ADDR(bsh + ofs);
|
||||
*bsp = val;
|
||||
ia64_st2(bsp, val);
|
||||
ofs += 2;
|
||||
}
|
||||
}
|
||||
|
|
@ -553,11 +553,11 @@ static __inline void
|
|||
bus_space_set_region_4(bus_space_tag_t bst, bus_space_handle_t bsh,
|
||||
bus_size_t ofs, uint32_t val, size_t count)
|
||||
{
|
||||
uint32_t __volatile *bsp;
|
||||
uint32_t *bsp;
|
||||
while (count-- > 0) {
|
||||
bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
|
||||
__MEMIO_ADDR(bsh + ofs);
|
||||
*bsp = val;
|
||||
ia64_st4(bsp, val);
|
||||
ofs += 4;
|
||||
}
|
||||
}
|
||||
|
|
@ -566,11 +566,11 @@ static __inline void
|
|||
bus_space_set_region_8(bus_space_tag_t bst, bus_space_handle_t bsh,
|
||||
bus_size_t ofs, uint64_t val, size_t count)
|
||||
{
|
||||
uint64_t __volatile *bsp;
|
||||
uint64_t *bsp;
|
||||
while (count-- > 0) {
|
||||
bsp = (bst == IA64_BUS_SPACE_IO) ? __PIO_ADDR(bsh + ofs) :
|
||||
__MEMIO_ADDR(bsh + ofs);
|
||||
*bsp = val;
|
||||
ia64_st8(bsp, val);
|
||||
ofs += 8;
|
||||
}
|
||||
}
|
||||
|
|
@ -588,7 +588,7 @@ bus_space_copy_region_1(bus_space_tag_t bst, bus_space_handle_t bsh1,
|
|||
bus_size_t ofs1, bus_space_handle_t bsh2, bus_size_t ofs2, size_t count)
|
||||
{
|
||||
bus_addr_t dst, src;
|
||||
uint8_t __volatile *dstp, *srcp;
|
||||
uint8_t *dstp, *srcp;
|
||||
src = bsh1 + ofs1;
|
||||
dst = bsh2 + ofs2;
|
||||
if (dst > src) {
|
||||
|
|
@ -602,7 +602,7 @@ bus_space_copy_region_1(bus_space_tag_t bst, bus_space_handle_t bsh1,
|
|||
srcp = __MEMIO_ADDR(src);
|
||||
dstp = __MEMIO_ADDR(dst);
|
||||
}
|
||||
*dstp = *srcp;
|
||||
ia64_st1(dstp, ia64_ld1(srcp));
|
||||
src -= 1;
|
||||
dst -= 1;
|
||||
}
|
||||
|
|
@ -615,7 +615,7 @@ bus_space_copy_region_1(bus_space_tag_t bst, bus_space_handle_t bsh1,
|
|||
srcp = __MEMIO_ADDR(src);
|
||||
dstp = __MEMIO_ADDR(dst);
|
||||
}
|
||||
*dstp = *srcp;
|
||||
ia64_st1(dstp, ia64_ld1(srcp));
|
||||
src += 1;
|
||||
dst += 1;
|
||||
}
|
||||
|
|
@ -627,7 +627,7 @@ bus_space_copy_region_2(bus_space_tag_t bst, bus_space_handle_t bsh1,
|
|||
bus_size_t ofs1, bus_space_handle_t bsh2, bus_size_t ofs2, size_t count)
|
||||
{
|
||||
bus_addr_t dst, src;
|
||||
uint16_t __volatile *dstp, *srcp;
|
||||
uint16_t *dstp, *srcp;
|
||||
src = bsh1 + ofs1;
|
||||
dst = bsh2 + ofs2;
|
||||
if (dst > src) {
|
||||
|
|
@ -641,7 +641,7 @@ bus_space_copy_region_2(bus_space_tag_t bst, bus_space_handle_t bsh1,
|
|||
srcp = __MEMIO_ADDR(src);
|
||||
dstp = __MEMIO_ADDR(dst);
|
||||
}
|
||||
*dstp = *srcp;
|
||||
ia64_st2(dstp, ia64_ld2(srcp));
|
||||
src -= 2;
|
||||
dst -= 2;
|
||||
}
|
||||
|
|
@ -654,7 +654,7 @@ bus_space_copy_region_2(bus_space_tag_t bst, bus_space_handle_t bsh1,
|
|||
srcp = __MEMIO_ADDR(src);
|
||||
dstp = __MEMIO_ADDR(dst);
|
||||
}
|
||||
*dstp = *srcp;
|
||||
ia64_st2(dstp, ia64_ld2(srcp));
|
||||
src += 2;
|
||||
dst += 2;
|
||||
}
|
||||
|
|
@ -666,7 +666,7 @@ bus_space_copy_region_4(bus_space_tag_t bst, bus_space_handle_t bsh1,
|
|||
bus_size_t ofs1, bus_space_handle_t bsh2, bus_size_t ofs2, size_t count)
|
||||
{
|
||||
bus_addr_t dst, src;
|
||||
uint32_t __volatile *dstp, *srcp;
|
||||
uint32_t *dstp, *srcp;
|
||||
src = bsh1 + ofs1;
|
||||
dst = bsh2 + ofs2;
|
||||
if (dst > src) {
|
||||
|
|
@ -680,7 +680,7 @@ bus_space_copy_region_4(bus_space_tag_t bst, bus_space_handle_t bsh1,
|
|||
srcp = __MEMIO_ADDR(src);
|
||||
dstp = __MEMIO_ADDR(dst);
|
||||
}
|
||||
*dstp = *srcp;
|
||||
ia64_st4(dstp, ia64_ld4(srcp));
|
||||
src -= 4;
|
||||
dst -= 4;
|
||||
}
|
||||
|
|
@ -693,7 +693,7 @@ bus_space_copy_region_4(bus_space_tag_t bst, bus_space_handle_t bsh1,
|
|||
srcp = __MEMIO_ADDR(src);
|
||||
dstp = __MEMIO_ADDR(dst);
|
||||
}
|
||||
*dstp = *srcp;
|
||||
ia64_st4(dstp, ia64_ld4(srcp));
|
||||
src += 4;
|
||||
dst += 4;
|
||||
}
|
||||
|
|
@ -705,7 +705,7 @@ bus_space_copy_region_8(bus_space_tag_t bst, bus_space_handle_t bsh1,
|
|||
bus_size_t ofs1, bus_space_handle_t bsh2, bus_size_t ofs2, size_t count)
|
||||
{
|
||||
bus_addr_t dst, src;
|
||||
uint64_t __volatile *dstp, *srcp;
|
||||
uint64_t *dstp, *srcp;
|
||||
src = bsh1 + ofs1;
|
||||
dst = bsh2 + ofs2;
|
||||
if (dst > src) {
|
||||
|
|
@ -719,7 +719,7 @@ bus_space_copy_region_8(bus_space_tag_t bst, bus_space_handle_t bsh1,
|
|||
srcp = __MEMIO_ADDR(src);
|
||||
dstp = __MEMIO_ADDR(dst);
|
||||
}
|
||||
*dstp = *srcp;
|
||||
ia64_st8(dstp, ia64_ld8(srcp));
|
||||
src -= 8;
|
||||
dst -= 8;
|
||||
}
|
||||
|
|
@ -732,7 +732,7 @@ bus_space_copy_region_8(bus_space_tag_t bst, bus_space_handle_t bsh1,
|
|||
srcp = __MEMIO_ADDR(src);
|
||||
dstp = __MEMIO_ADDR(dst);
|
||||
}
|
||||
*dstp = *srcp;
|
||||
ia64_st8(dstp, ia64_ld8(srcp));
|
||||
src += 8;
|
||||
dst += 8;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -54,8 +54,8 @@ breakpoint(void)
|
|||
#define HAVE_INLINE_FFS
|
||||
#define ffs(x) __builtin_ffs(x)
|
||||
|
||||
#define __MEMIO_ADDR(x) (__volatile void*)(IA64_PHYS_TO_RR6(x))
|
||||
extern __volatile void *ia64_ioport_address(u_int);
|
||||
#define __MEMIO_ADDR(x) (void*)(IA64_PHYS_TO_RR6(x))
|
||||
extern void *ia64_ioport_address(u_int);
|
||||
#define __PIO_ADDR(x) ia64_ioport_address(x)
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -281,6 +281,74 @@ ia64_ptc_l(u_int64_t va, u_int64_t log2size)
|
|||
__asm __volatile("ptc.l %0,%1;; srlz.i;;" :: "r"(va), "r"(log2size));
|
||||
}
|
||||
|
||||
/*
|
||||
* Unordered memory load.
|
||||
*/
|
||||
|
||||
static __inline uint8_t
|
||||
ia64_ld1(uint8_t *p)
|
||||
{
|
||||
uint8_t v;
|
||||
|
||||
__asm __volatile("ld1 %0=[%1];;" : "=r"(v) : "r"(p));
|
||||
return (v);
|
||||
}
|
||||
|
||||
static __inline uint16_t
|
||||
ia64_ld2(uint16_t *p)
|
||||
{
|
||||
uint16_t v;
|
||||
|
||||
__asm __volatile("ld2 %0=[%1];;" : "=r"(v) : "r"(p));
|
||||
return (v);
|
||||
}
|
||||
|
||||
static __inline uint32_t
|
||||
ia64_ld4(uint32_t *p)
|
||||
{
|
||||
uint32_t v;
|
||||
|
||||
__asm __volatile("ld4 %0=[%1];;" : "=r"(v) : "r"(p));
|
||||
return (v);
|
||||
}
|
||||
|
||||
static __inline uint64_t
|
||||
ia64_ld8(uint64_t *p)
|
||||
{
|
||||
uint64_t v;
|
||||
|
||||
__asm __volatile("ld8 %0=[%1];;" : "=r"(v) : "r"(p));
|
||||
return (v);
|
||||
}
|
||||
|
||||
/*
|
||||
* Unordered memory store.
|
||||
*/
|
||||
|
||||
static __inline void
|
||||
ia64_st1(uint8_t *p, uint8_t v)
|
||||
{
|
||||
__asm __volatile("st1 [%0]=%1;;" :: "r"(p), "r"(v));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
ia64_st2(uint16_t *p, uint16_t v)
|
||||
{
|
||||
__asm __volatile("st2 [%0]=%1;;" :: "r"(p), "r"(v));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
ia64_st4(uint32_t *p, uint32_t v)
|
||||
{
|
||||
__asm __volatile("st4 [%0]=%1;;" :: "r"(p), "r"(v));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
ia64_st8(uint64_t *p, uint64_t v)
|
||||
{
|
||||
__asm __volatile("st8 [%0]=%1;;" :: "r"(p), "r"(v));
|
||||
}
|
||||
|
||||
/*
|
||||
* Read the value of psr.
|
||||
*/
|
||||
|
|
|
|||
Loading…
Reference in a new issue