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Disable PCIe ASPM (Active State Power Management) for all

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controllers.
More and more RealTek controllers started to implement EEE feature.
Vendor driver seems to load a kind of firmware for EEE with
additional PHY fixups.  It is known that the EEE feature may need
ASPM support.  Unfortunately there is no documentation for EEE of
the controller so enabling ASPM may cause more problems.
This commit is contained in:
Pyun YongHyeon 2011-11-16 23:29:27 +00:00
parent 600af6c29b
commit 017f1c8db9
2 changed files with 22 additions and 1 deletions
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22
sys/dev/re/if_re.c
View file

@ -1186,6 +1186,7 @@ re_attach(device_t dev)
struct rl_softc *sc;
struct ifnet *ifp;
const struct rl_hwrev *hw_rev;
u_int32_t cap, ctl;
int hwrev;
u_int16_t devid, re_did = 0;
int error = 0, i, phy, rid;
@ -1241,8 +1242,10 @@ re_attach(device_t dev)
msic = pci_msi_count(dev);
msixc = pci_msix_count(dev);
if (pci_find_cap(dev, PCIY_EXPRESS, &reg) == 0)
if (pci_find_cap(dev, PCIY_EXPRESS, &reg) == 0) {
sc->rl_flags |= RL_FLAG_PCIE;
sc->rl_expcap = reg;
}
if (bootverbose) {
device_printf(dev, "MSI count : %d\n", msic);
device_printf(dev, "MSI-X count : %d\n", msixc);
@ -1334,6 +1337,23 @@ re_attach(device_t dev)
CSR_WRITE_1(sc, RL_EECMD, RL_EEMODE_OFF);
}
/* Disable ASPM L0S/L1. */
if (sc->rl_expcap != 0) {
cap = pci_read_config(dev, sc->rl_expcap +
PCIR_EXPRESS_LINK_CAP, 2);
if ((cap & PCIM_LINK_CAP_ASPM) != 0) {
ctl = pci_read_config(dev, sc->rl_expcap +
PCIR_EXPRESS_LINK_CTL, 2);
if ((ctl & 0x0003) != 0) {
ctl &= ~0x0003;
pci_write_config(dev, sc->rl_expcap +
PCIR_EXPRESS_LINK_CTL, ctl, 2);
device_printf(dev, "ASPM disabled\n");
}
} else
device_printf(dev, "no ASPM capability\n");
}
hw_rev = re_hwrevs;
hwrev = CSR_READ_4(sc, RL_TXCFG);
switch (hwrev & 0x70000000) {

1
sys/pci/if_rlreg.h
View file

@ -868,6 +868,7 @@ struct rl_softc {
const struct rl_hwrev *rl_hwrev;
int rl_eecmd_read;
int rl_eewidth;
int rl_expcap;
int rl_txthresh;
struct rl_chain_data rl_cdata;
struct rl_list_data rl_ldata;