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opnsense-src/sys/arm/xscale/std.xscale

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Instead of using sysarch() to store-retrieve the tp, add a magic address, ARM_TP_ADDRESS, where the tp will be stored. On CPUs that support it, a cache line will be allocated and locked for this address, so that it will never go to RAM. On CPUs that does not, a page is allocated for it (it will be a bit slower, and is wrong for SMP, but should be fine for UP). The tp is still stored in the mdthread struct, and at each context switch, ARM_TP_ADDRESS gets updated. Suggested by: davidxu
2005-02-26 13:59:01 -05:00
# $FreeBSD$
options ARM_CACHE_LOCK_ENABLE
Merging projects/armv6, part 1 Cummulative patch of changes that are not vendor-specific: - ARMv6 and ARMv7 architecture support - ARM SMP support - VFP/Neon support - ARM Generic Interrupt Controller driver - Simplification of startup code for all platforms
2012-08-14 23:03:03 -04:00
options NO_EVENTTIMERS
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