opnsense-src/test/TableGen/IntBitInit.td

mirror of https://github.com/opnsense/src.git synced 2026-03-21 02:10:09 -04:00
// RUN: llvm-tblgen %s

def {
  bit A = 1;
  int B = A;
}
Vendor import of llvm release_30 branch r142614: http://llvm.org/svn/llvm-project/llvm/branches/release_30@142614 2011-10-20 17:10:27 -04:00			`// RUN: llvm-tblgen %s`
Vendor import of llvm release_34 branch r197841 (effectively, 3.4 RC3): https://llvm.org/svn/llvm-project/llvm/branches/release_34@197841 2013-12-21 19:04:03 -05:00
Import LLVM, at r72732. 2009-06-02 13:52:33 -04:00			`def {`
			`bit A = 1;`
			`int B = A;`
			`}`