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436b76bb17
Unfortunately, C still lacks a standard function for pause (x86, sparc) or yeild (arm) instructions, for use in spin lock or CAS loops. BIND has its own based on vendor intrinsics or inline asm. Previously, it was buried in the `isc_rwlock` implementation. This commit renames `isc_rwlock_pause()` to `isc_pause()` and moves it into <isc/pause.h>. This commit also fixes the configure script so that it detects ARM yield support on systems that identify as `aarch*` instead of `arm*`. On 64-bit ARM systems we now use the ISB (instruction synchronization barrier) instruction in preference to yield. The ISB instruction pauses the CPU for longer, several nanoseconds, which is more like the x86 pause instruction. There are more details in a Rust pull request, which also refers to MySQL making the same change: https://github.com/rust-lang/rust/pull/84725
42 lines
1.4 KiB
C
42 lines
1.4 KiB
C
/*
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* Copyright (C) Internet Systems Consortium, Inc. ("ISC")
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*
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* SPDX-License-Identifier: MPL-2.0
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*
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* This Source Code Form is subject to the terms of the Mozilla Public
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* License, v. 2.0. If a copy of the MPL was not distributed with this
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* file, you can obtain one at https://mozilla.org/MPL/2.0/.
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*
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* See the COPYRIGHT file distributed with this work for additional
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* information regarding copyright ownership.
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*/
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#pragma once
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#if defined(__x86_64__)
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#include <immintrin.h>
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#define isc_pause() _mm_pause()
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#elif defined(__i386__)
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#define isc_pause() __asm__ __volatile__("rep; nop")
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#elif defined(__ia64__)
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#define isc_pause() __asm__ __volatile__("hint @pause")
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#elif defined(__aarch64__)
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#define isc_pause() __asm__ __volatile__("isb")
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#elif defined(__arm__) && HAVE_ARM_YIELD
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#define isc_pause() __asm__ __volatile__("yield")
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#elif defined(sun) && (defined(__sparc) || defined(__sparc__))
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#include <synch.h>
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#define isc_pause() smt_pause()
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#elif (defined(__sparc) || defined(__sparc__)) && HAVE_SPARC_PAUSE
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#define isc_pause() __asm__ __volatile__("pause")
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#elif defined(__ppc__) || defined(_ARCH_PPC) || defined(_ARCH_PWR) || \
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defined(_ARCH_PWR2) || defined(_POWER)
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#define isc_pause() __asm__ volatile("or 27,27,27")
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#else
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#define isc_pause() sched_yield()
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#endif
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#define isc_pause_n(iters) \
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for (size_t __pause = 0; __pause < iters; __pause++) { \
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isc_pause(); \
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}
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